| PART |
Description |
Maker |
| A43L2616V-6PH A43L2616V-7PH |
Cycle time:6ns; 166MHz CL=3 access time:5.0ns 1M x 16bit x 4banks synchronous DRAM
Cycle time:7ns; 143MHz CL=3 access time:5.4ns 1M x 16bit x 4banks synchronous DRAM
|
AMIC Technology
|
| PYA28C16BE-20CWM PYA28C16BE-20CWMB PYA28C16BE-20LM |
Access Times of 150, 200, 250 and 350ns Byte Write Cycle Time - 10 ms Maximum
|
Pyramid Semiconductor C...
|
| AN1078 |
ST7 PWM DUTY CYCLE SWITCH IMPLEMENTING TRUE 0% & 100% DUTY CYCLE
|
SGS Thomson Microelectronics
|
| IDT70825S_L |
HIGH SPEED 128K (8K X 16 BIT) SEQUENTIAL ACCESS RANDOM ACCESS MEMORY (SARAM?)
|
IDT
|
| IDT70825L IDT70825L20G IDT70825L20GB IDT70825L20PF |
HIGH-SPEED 8K x 16 SEQUENTIAL ACCESS RANDOM ACCESS MEMORY (SARAM)
HIGH-SPEED 8K x 16 SEQUENTIAL ACCESS RANDOM ACCESS MEMORY (SARAM⑩)
|
IDT[Integrated Device Technology]
|
| CAT93C46AJ CAT93C46AJI CAT93C46AJI-2.5 CAT93C46AJ- |
72-Mbit QDR™-II SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency)
72-Mbit QDR™-II SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency)
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency)
256K (32K x 8) Static RAM
256 Kb (256K x 1) Static RAM
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency)
Microwire Serial EEPROM 微型导线串行EEPROM
|
Atmel, Corp.
|
| LUCL9311AP-DT LUCL9311GP-D LUCL9311GP0DT |
Line Interface and Line Access Circuit Full-Feature SLIC with High Longitudinal Balance, Ringing Relay,and GR-909 Test Access
|
http://
|
| SDA9253 SDA9253GEG |
2.6Mbit Dynamic Sequential Access Mem...
2.6 MBit Dynamic Sequential Access Memory for Television Applications (TV-SAM)
From old datasheet system
|
Infineon
SIEMENS[Siemens Semiconductor Group]
|
| CY7C1543V18 CY7C1543V18-300BZC CY7C1543V18-300BZI |
72-Mbit QDR垄芒-II SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency)
72-Mbit QDR?II SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency)
|
Cypress Semiconductor
|
| CY7C1261V18 CY7C1261V18-300BZC CY7C1261V18-300BZI |
36-Mbit QDR⑩-II SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency)
36-Mbit QDR垄芒-II SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency)
|
Cypress Semiconductor
|
| IDT71V3577S75PFG IDT71V3577SA80PFGI IDT71V3577SA85 |
3.3V 128K x 36 Synchronous Flow-Through SRAM w/3.3V I/O
128K X 36, 256K X 18 3.3V Synchronous SRAMs 3.3V I/O, Flow-Through Outputs Burst Counter, Single Cycle Deselect 128K的米656 × 18 3.3同步SRAM.3VI / O的流量，通过输出脉冲计数器，单周期取
128K X 36, 256K X 18 3.3V Synchronous SRAMs 3.3V I/O, Flow-Through Outputs Burst Counter, Single Cycle Deselect 256K X 18 CACHE SRAM, 7.5 ns, PQFP100
128K X 36, 256K X 18 3.3V Synchronous SRAMs 3.3V I/O, Flow-Through Outputs Burst Counter, Single Cycle Deselect 128K X 36 CACHE SRAM, 7.5 ns, PQFP100
128K X 36, 256K X 18 3.3V Synchronous SRAMs 3.3V I/O, Flow-Through Outputs Burst Counter, Single Cycle Deselect 128K的米656 × 18 3.3同步SRAM.3V的I / O的流量，通过输出脉冲计数器，单周期取
128K X 36, 256K X 18 3.3V Synchronous SRAMs 3.3V I/O, Flow-Through Outputs Burst Counter, Single Cycle Deselect 256K X 18 CACHE SRAM, 8 ns, PBGA165
|
IDT
Integrated Device Technology, Inc.
INTEGRATED DEVICE TECHNOLOGY INC
Integrated Device Techn...
|
| SWE81800 |
Deep cycle battery
|
Shenzhen Sunnyway Battery Tech Co.Ltd.
|
